Field of the Invention
The present invention relates to a display device used in projectors, laptop PCs, monitors, mobile phones, PDAs, and the like, and to an apparatus that uses this display device.
Description of the Related Art
Conventionally, drive circuits and various other circuits in display devices are configured with an LSI or the like that is made by using silicon technology, and are disposed outside of the display device. However, as technology has developed in recent times, the drive circuits and various other circuits have come to be mounted on a carrier substrate of the display devices, and display devices mounted with these circuits are being brought into practical use. A known example of a display device with such a circuit internally mounted is a display device in which the circuits are configured with a high-temperature polysilicon TFT (Thin Film Transistor) that is formed by a high-temperature process in which a high-cost quartz substrate is used as the carrier substrate. Also being placed in practical use are display devices in which circuits are mounted on a glass substrate or the like by using low-temperature polysilicon technology, whereby a precursor film is formed with a low-temperature process, and the precursor film is annealed using a laser or the like to produce a polycrystalline structure.
A specific example is the active matrix display device disclosed in FIGS. 37 and 38 of Japanese Laid-Open Patent Application No. 2004-046054. FIG. 1 is a block diagram showing the structure of the display system of the conventional common drive circuit-integrated liquid crystal display device described in FIG. 37 of Japanese Laid-Open Patent Application No. 2004-046054.
Referring to FIG. 1, integrally formed by polysilicon TFT on a display device substrate 101 in a conventional drive circuit-integrated liquid crystal display device are an active matrix display area 110 in which M rows and N columns of pixels are disposed and wired in the form of a matrix, a row scanning circuit (scan line (gate line) drive circuit) 109, a column scanning circuit (data line drive circuit) 3504, an analog switch 3505, a level shifter 3503, and other components.
Also, mounted outside the display device substrate 101 is an integrated circuit chip (IC chip) in which a controller 113, memory 111, digital analog converter circuit (DAC circuit) 3502, scanning circuit/data register 3501, and other components are formed on a single-crystal silicon wafer as a controller IC (Integrated Circuit) 102. An interface circuit 114 is formed on a system-side circuit substrate 104 and is connected to the controller 113 and memory 111.
Also present in a conventional drive circuit-integrated liquid crystal display device structured with polysilicon TFT is a device integrally formed with a circuit that is more complicated than a DAC circuit and the like. FIG. 2 is a block diagram showing the structure of the display system of a conventional drive circuit-integrated liquid crystal display device with an internally mounted DAC circuit described in FIG. 38 of Japanese Laid-Open Patent Application No. 2004-046054.
In a conventional drive circuit-integrated liquid crystal display device with an internally mounted DAC circuit, in the same manner as the device in FIG. 1 that does not have an internally mounted DAC circuit, integrally formed on the display device substrate 101 are an active matrix display area 110 in which M rows and N columns of pixels are disposed and wired in the form of a matrix, a row scanning circuit 109, and a column scanning circuit 3504, and additionally integrally formed are a data register 3507, a latch circuit 105, a DAC circuit 106, a selector circuit 107, a level shifter (D bit) 108, and other components.
A controller IC 103 that is mounted outside of the display device substrate 101 of the drive circuit-integrated liquid crystal display device with an internally mounted DAC circuit does not include a high-voltage DAC circuit 3502, and it is possible to configure the memory 111, output buffer circuit 112, and controller 113 all with low-voltage circuits and elements. As a result, a controller IC 103 can be fabricated without the simultaneous use of high-voltage processes that require voltage signals to be generated for writing to the liquid crystal. Therefore, the cost of the controller can be made lower than that of the controller IC 102 in which the DAC circuit 3502 described above is also mounted.
However, the drive circuit-integrated liquid crystal display devices of the prior art transfer display data of all of the pixels to the liquid crystal module serially at high speed for each frame time interval. Therefore, as a result of higher definition, the required transfer rate commensurate with the increase in the number of pixels becomes much higher. And for high speed transfer, the driver IC also must operate at higher speed, a through-current or the like is generated in the large number of CMOS (Complementary Metal Oxide Semiconductor) components constituting the circuit elements, and power consumption increases together with the increase in operating speed. ICs that operate at high speed also have higher cost. The complexity and transfer speed of the circuit structure then increases when the gradation increases, leading to further increases in power consumption and higher costs. More specifically, since the price and power consumption of the driver IC increase together with higher definition and higher gradation of displays, there is a problem in that the number of pixels and gradations is limited because the power consumption and price of the system overall must be limited.
The voltages used in the circuit blocks on the display device substrate 101 are different, and there is therefore a problem in that it is necessary to jointly use processes that are suited to a plurality of voltages, and costs in the manufacturing process increase.
The drive circuit-integrated liquid crystal display devices also have a problem in that the size of the display device cannot be reduced because the controller IC and interface circuit 114 are mounted outside the display device substrate.
In view of the above, the present inventors have filed a patent application (Japanese Patent Application (Tokugan) 2004-272638) for an invention that claims a structure and a drive method for the structure that advances the integration of circuits on a carrier substrate and integrates the memory on the carrier substrate. In a circuit in which MOS (Metal Oxide Semiconductor) transistors with a polysilicon TFT or another SOI (Silicon on Insulator) structure is integrated, the technology allows operation malfunctions due to hysteresis to be limited and the sensitivity of latch circuits and latch sense amp circuits that have these MOS transistors as constituent components to be improved.
In this manner, the prior application achieves the initial objects, but in a structure in which memory is integrated on the carrier substrate, it is difficult to reduce the parasitic capacitance of the bit lines. Therefore, there is a limit to reducing the capacitance of the memory cells and it is difficult to reduce the circuit surface area of the frame memory. As a result, it is difficult to reduce the size of display devices that use the frame memory.
Also, this technology requires a considerable amount of electric current for charging and discharging because the capacitance of the memory cells is high. Electric potential is reduced due to wiring resistance because the circuit surface area is large, and power consumption is high due to charging and discharging of the parasitic capacitance of the wiring, leading to a limitation to the amount by which power consumption can be reduced.